Energy-Efficient Computing and AI Chip
We mainly conduct research on integrated circuits and systems as well as EDA for IC and FPGA, aiming to push the limits of performance and energy-efficiency of electronic systems. More specifically, we are working on integrated circuits and systems for artificial intelligence and computer vision, hardware security and energy-efficient power supply for multi-core.
2020 DAC - DVFS-Based Scrubbing Scheduling for Reliability Maximization on Parallel Tasks in SRAM-based FPGAs
2020 IEEE TCAS-II - Histogram of Oriented Gradients Feature Extraction from Raw Bayer Pattern Images
2020 IEEE TCAS-I - Cascaded Form Sparse FIR Filter Design
2019 IEEE TCAD - A system-level framework for online power and supply noise prediction
2019 IEEE TCAS-I - Design of Sparse FIR Filters with Reduced Effective Length
2018 DAC - A system level framework for on-line supply noise prediction
2016 IEEE TCAD - Machine learning for noise sensor placement and full-chip voltage emergency detection
2015 DAC - A Statistical Methodology for Noise Sensor Placement and Full-Chip Voltage Map Generation
http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=7167278
Post-Moore Microelectronics and Integrated Circuit Center, ShanghaiTech University
393 Middle Huaxia Road, Pudong, Shanghai, China, 201210
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